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VID - 97 - D001
JAN. 1998
SPECIFICATION for KS5520
SYSTEM LSI BUSINESS SAMSUNG ELECTRONICS CO.
SPECIFICATION for KS5520
CONTENTS
* OUTLINE OF PRODUCT ------------3 3 3 3 3 4 4 6
Important Notice
Copyright 1998 by SAMSUNG The information in this publication has been carefully checked and is believed to be accurate at the time of publication. Samsung assumes no responsibility, however, for possible errors or omissions, or for any consequences resulting from the use of the information contained herein. Samsung reserves the right to make changes in its products or product specifications with the intent to improve function or design at any time and without notice and is not required to update this documentation to reflect such changes. This publication does not convey to a purchaser of semiconductor devices described herein any license under the patent rights of Samsung or others. Samsung makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Samsung assume any liability arising out of the application or use of any product or circuit and specifically disclaims any liability, including without limitation any consequence or incidental damages. *Typical* parameters can and do vary in different applications. All operating parameters, including *Typicals,* must be validated for each customer application by the customer*s technical experts. Samsung products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, for other applications intended to support or sustain life, or for any other application in which the failure of the Samsung product could cause personal injury or death. Should the buyer purchase or use a Samsung product for any such unintended or unauthorized application, the buyer shall indemnify and hold Samsung and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, expenses, and reasonable attorney fees arising out of, either directly or indirectly, any claim of personal injury or death that may be associated with such unintended or unauthorized use, even if such claim alleges that Samsung was negligent regarding the design or manufacture or manufacture of said product.
* FUNCTIONS ----------------------------* FEATURES ------------------------------* OPTION CODE -------------------------* ORDERING INFORMATION --------* BLOCK DIAGRAM --------------------* PIN CONFIGURATION ---------------* ABSOLUTE MAXIMUM RATING --
* ELECTRICAL CHARACTERISTICS - 7 * TIMING DIAGRAM ---------------------* MEMORY STRUCTURE --------------* SCREEN STRUCTURE --------------* BLANK MODE -------------------------8 9 15 15
* SCROLL/HALF-TONE FUNCTION - 16 * BOX DRAWING FUNCTION --------* APPLICATION CIRCUIT -------------* PACKAGE DIMENSIONS -----------17 18 20
KS5520-XX
1. OUTLINE OF PRODUCT
ON SCREEN DISPLAY PROCESSOR
The KS5520 is a single chip VLSI device which performs the on screen display function with sync seperation of video composite signal and AFC is proposed. It can choose total 256 characters and display up to 360 characters in a screen. It can also select various built-in functions such as character color select, inverse, etc. These functions are compatible with all video systems including NTSC, PAL, SECAM.
24 - SDIP - 300
24 - SOP - 375
2. FUNCTIONS
* On screen display * Sync separator and sync detector * AFC
3. FEATURES
* Screen structure : 360 ( 30 columns * Character structure : 12
4.2 ORDERING INFORMATION
a 18 dots
a 12 rows)
Device
Package 24-SDIP-300
Operating Temprature - 20 ~ + 70 - 20 ~ + 70
* Character types : 256 kinds of color characters KS5520-XX * Display position : 62 horizontal position * Character size : 4 64 vertical position
KS5520D-XX 24-SOP-375
a 4 times
of normal in both vertical and horizontal directions
* Blinking : controllable in character unit, blinking time also controllable * Blanking : controllable in line units, blanking mode change possible Blank color fill possible in character units (8 colors) * Background coloring : 8 colors * Character coloring : coloring of characters possible in blank mode * Inverse character display : controllable in character units * Synchronous ways : automatic selection of internal or external synchronization via MICOM control * Built-in clamp, horizontal/vertical sync separator & sync detector circuit * Sync detection sensitivity can be adjusted via MICOM control. * Built-in analog horizontal/vertical sync PLL circuit * Scroll & Box Drawing ability * Half-Tone function ability * NTSC / PAL / SECAM mode via MICOM control
4.1 OPTION CODE
Code No. KS5520-01 Remark English, Russian, German, French, Spanish, Italian, Polish, Portuguese, Swedish Denish, Dutch, Esperanto, Vietnamese, Indonesian, Czechoslovak KS5520D-04 English, Russian, German, French, Spanish, Italian, Polish, Portuguese, Swedish Denish, Dutch, Esperanto, Vietnamese, Indonesian, Czechoslovak, Greek
VID-97-D001 98-05-14 3
KS5520-XX
5. BLOCK DIAGRAM
ON SCREEN DISPLAY PROCESSOR
SCK 2 CSB 6 SIN 7
SERIAL INTERFACE ADDRESS COUNTER HORIZONTAL CONTROL TIMING GENERATOR ROM COLUMN DECODER
RAM
ROM
18 SCCR
PARALLEL IN SERIAL OUT
MIXER
BUFFER
19 CVOUT
VERTICAL CONTROL
CLAMP
17 CVIN
COLOR GENERATOR XTIN 21 XTOUT 22 HSYNC GENERATOR VSYNC GENERATOR CLAMPIN
9
CSYNC GENERATOR
SYNC DELAY
LC OSCILLATOR
4 5
OSC IN OSC OUT
CLAMP
SYNC SEPARATOR
SYNC CONTROL
PLL
8
23
20
11
12
15
13
14
LPF
CSYNC
SYD
PD OUT VCO IN R CNTR
C N1
C N2
6. PIN CONFIGURATION & DESCRIPTION 6.1 PIN CONFIGURATION
DGND 1 SCK 2 RESETB 3 OSCIN 4 OSCOUT 5 CSB 6 SIN 7 LPF 8 CLAMPIN 9 AGND 10 PD OUT 11 VCO IN 12
24 DVDD 23 CSYNC 22 XTOUT 21 XTIN 20 SYD
KS5520
19 CVOUT 18 SCCR 17 CVIN 16 AVDD 15 R CNTR 14 C NOD2 13 C NOD1
VID-97-D001 98-05-14
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KS5520-XX
6.2 PIN DESCRIPTION
Pin No. 1 2 Symbol DGND SCK I/O I
ON SCREEN DISPLAY PROCESSOR
Function Digital Ground Serial clock input. When CSB pin is low, then 16-bit serial data is inputted by controlling micom. Built-in pull-up resistor.
3
RESETB
I
Auto clear pin. If low, then all circuit is reset. Built-in pull-up resistor.
4
OSCIN
I
LC oscillation pin. Standard frequency is 9MHz & the horizontal start position and the horizontal size are controlled
5
OSCOUT
O by the clock of oscillation block.
6
CSB
I
While pin 6 is low, serial data input is active. Built - in pull-up resistor
7 8 9 10 11
SIN LPF CLAMPIN AGND PD OUT
I I I O
Serial data input pin. Built-in pull-up resistor LPF gets rid of the color signal in a video input signal. Clamp input pin of composite video signal of 2Vpp Analog ground Phase detect output of analog PLL. Loop filter is formed by PD OUT and VCO IN.
12 13 14 15 16 17 18 19
VCO IN C NOD1 C NOD2 R CNTR AVDD CVIN SCCR CVOUT
I O O O I I O
VCO input pin of PLL Capacitor node 1 of PLL VCO Capacitor node 2 of PLL VCO Resistor node of PLL VCO 5V Analog VDD Composite video input pin When SECAM mode, color signal is mixed in the character level. Composite video output pin
VID-97-D001 98-05-14
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KS5520-XX
6.2 PIN DESCRIPTION ( Continued )
ON SCREEN DISPLAY PROCESSOR
Pin No. Symbol 20 21 22 23 SYD XTIN XTOUT CSYNC
I/O O I O O
Function H-sync detect output pin. If sync exists, then high if not, low X-tal input / output pin NTSC : 14.31818 MHz, PAL : 17.734475MHz When external, C-sync separator output is out, when internal, then internal C-sync is outputted.
24
DVDD
-
5V Digital VDD
7. ABSOLUTE MAXIMUM RATINGS ( Ta = 25 )
Characteristics Supply Voltage Input Voltage Power Dissipation Operating Temperature Storage Temperature
Symbol VDD VIN PD Topr Tstg VSS - 0.3
Value 3.0 ~ 7.0
Unit V VDD + 0.3 V mW
VIN 200
- 20 ~ + 70 - 40 ~ + 125

VID-97-D001 98-05-14
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KS5520-XX
Characteristics Operating Voltage Operating Current Input High Voltage Input Low Voltage Output High Voltage (2m drive) Output Low Voltage (2m drive) Pin8 LPF Voltage Pin9 Clamp Voltage Pin15 R_CNTR Voltage Pin17 Clamp Voltage Buffer Gain LC Oscillation Frequency Hsync Duty Hsync Frequency X-tal Oscillation Frequency Sync Separation Voltage Blueback Sync Tip Level Blueback Pedestal Level Blueback Color Burst Level High Blueback Color Burst Level Low Blueback Color Level High Blueback Color Level Low Blueback Blank Level High Blueback Blank Level Low Blueback Character Level High Blank Color Off Level Box White Level Box Black Level HalfTone Level VCO Input Voltage AFC Freerun Frequency AFC Lock Range High AFC Lock Range Low
ON SCREEN DISPLAY PROCESSOR
Symbol VDD Icc VIH VIL VOH VOL Vp8 Vp9 Vp15 Vp17 Vp19G Fosc Fh_duty H_fre Fp22 Vse Vbst Vbpd Vcbh Vcbl Vbch Vbcl Vblkh Vblk1 Vchh Vbcof Vbwl Vbbl Vhalf Vvco Ffr Falh Fall
VID-97-D001 98-05-14
8. ELECTRICAL CHARACTERISTICS ( Ta = 25, AVDD = DVDD = 5V )
Min 4.75 20 0.8VDD 0.7VDD 2.15 1.25 2.35 0.60 1.80 8.0 250 15.5 14.1 0.10 0.50 1.10 1.40 0.80 2.30 1.30 1.40 1.10 2.40 1.10 2.20 1.10 1.80 2.30 15.5 200 Typ 5.00 40 2.35 1.45 2.50 0.80 2.00 9.0 550 15.7 14.3 0.25 0.80 1.40 1.70 1.10 2.60 1.60 1.70 1.40 2.70 1.40 2.50 1.40 2.10 2.50 15.7 300 Max 5.25 60 0.2VDD 0.3VDD 2.55 1.65 2.65 1.00 2.20 10.0 850 15.9 14.5 0.40 1.10 1.70 2.00 1.40 2.90 1.90 2.00 1.70 3.00 1.70 2.80 1.70 2.40 2.70 15.9 400 -500 Unit V mA V V V V V V V V V MHz nS KHz MHz V V V V V V V V V V V V V V V KHz Hz Hz
7
Note 1 : Specifications are subject to change without notice.
KS5520-XX
9. TIMING DIAGRAM
ON SCREEN DISPLAY PROCESSOR
SCK CSB
Address (16Bits)
Tword Twtw
SIN
Data N (16Bits)
Data N+1 (16Bits)
Twcsb Tsetcsb Tholdcsb
CSB
Twsck Twsck
SCK
Tsetsin Tholdsin
SIN
ITEM
SYMBOL MIN Twsck Twcsb Tsetcsb Tholdcsb Tsetsin Tholdsin Tword Twtw 200 1 200 2 200 200 10 1
LIMITS UNIT TYP MAX nsec usec nsec usec nsec nsec usec usec
SCK Width CSB Width CSB Setup Time CSB Hold Time SIN Setup Time SIN Hold Time 1 Word Write Time Word To Word Time
VID-97-D001 98-05-14
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KS5520-XX
10. MEMORY STRUCTURE
ON SCREEN DISPLAY PROCESSOR
It consists of 360*16 bits SRAM, 256 font ROM and 5 mode control register.
DAF 0 Box_ Inv 1 2 3 . . . . . . 357 358 359 Box_ Inv 360 0 * (Note)
DAE DAD Box 1 Box 0
DAC R
DAB DAA G B
DA9
DA8
DA7 C7
DA6 C6
DA5 C5
DA4 C4
DA3 C3
DA2 C2
DA1 DA0 C1 C0
Invert Blink
* (No te)
* (Note)
*
*
Character Code (ROM Address)
(Note) (Note)
Box 1 0
Box 0
R
G
B
Invert Blink
C7
C6
C5
C4
C3
C2
C1
C0
Half_ Blink Tone 1
Blink Blink_ 0 Time
HZ 21 VZ 21
HZ 20 VZ 20
HZ 11 VZ 11 Blk 0
HZ 10 VZ 10 Blk Col
HP 5 VP 5 C_
HP 4 VP 4 R_
HP 3 VP 3 R_
HP 2 VP 2 R_
HP 1 VP 1 R_
HP 0 VP 0 R_
361
0
Ext_ Blank_ Scroll_ Scroll_ Inter fsc Level Time On -nal
362
0
RAM_ Disp_ P626/ Inlace Secam NTSC/ Blk Erase On 0 P628 /NonAll_ Blank DSP DSP B Flh3 A Flh2 PAL DSP 9 Flh1 1 DSP 8 Flh0
Level Lev1 DSP 5 Fcl1 DSP 4 Fcl0
Lev0 Cntr2 Cntr1 Cntr0 DSP 3 DSP DSP DSP 2 1 0
363
0
0
DSP DSP 7 Fcl3 6 Fcl2
364
0
Fll2
Fll1
Fll0
Fch3 Fch2 Fch1 Fch0
* (Note) : same as above. < Raster Color Level Control > (Control Register 362 (16AH)) DA4(Lev 1) 0 0 1 1 DA3(Lev 0) 0 1 0 1 Raster Color Level H Raster Color Level L 2.6V 2.2V 2.2V 2.0V 1.6V 1.4V 1.4V 1.3V Remark Level 0 Level 1 Level 1 Level 2
VID-97-D001 98-05-14
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KS5520-XX
ON SCREEN DISPLAY PROCESSOR
CONTROL REGISTER 1) Register 360 (168H) ContentSs Register State HP0 0 1 1 HP1 0 1 2 HP2 0 1 3 HP3 0 1 4 HP4 0 1 5 HP5 0 1 6 HZ10 0 1 7 HZ11 0 1 8 HZ20 0 1 9 HZ21 0 1 1 A Blink Time B Blink 0 0 1 0 1 C Blink 1 0 1 D Halftone 0 1 Half-tone Off Half-tone On
VID-97-D001 98-05-14 10
DA0 ~ DAD 0
Remark Functions Horizontal Start Position
^ 4 * e ( HPn * 2 ) + N Tc : osc. period ( 1/9 E = 111 nsec )
5
HS = Tc *
n
n=o
HSZ11 HSZ21 0 0 1 1
HSZ10 HSZ20 0 1 0 1
N 9 10 11 12
HZ10 HZ11 0 1
0 1X 3X
1 2X 4X
1st line horizontal character size control
HZ20 HZ21 0
0 1X 3X
1 2X 4X
2nd ~ 12th line horizontal character size control
Blink Time = 1 sec Blink Time = 0.5 sec Blink0 Blink1 0 1 0 Off Duty 50% 1 Duty 25% Duty 75%
Blink Time Control
Blinking Duty Control
Half-tone On/Off
KS5520-XX
2) Register 361(169H)
ON SCREEN DISPLAY PROCESSOR
DA0 ~ DAE 0
Contents Register State VP0 0 1 VS = H * Functions Vertical Start Position H : horizontal synchronous pulse time H-SYNC V-SYNC HS Remark
1
VP1
0 1
^ 4 * e ( VPn * 2
5 n=o
n
)+ 3
2
VP2
0 1
3
VP3
0 1
VS
4
VP4
0 1
5
VP5
0 1
6
VZ10
0 1 VZ11 0 1
VZ10
0 1X 3X
1 2X 4X
1st line vertical character size control
7
VZ11
0 1
8
VZ20
0 1 VZ21 0
VZ20
0 1X 3X
1 2X 4X
9
VZ21
0 1 1 0 1 External SYNC Internal SYNC Scroll Off Scroll On Scroll Time 0.5 sec Scroll Time 1 sec Blank Low Level 0 (1.4V) Blank Low Level 1 (1.8V) External 4fsc X-TAL (Pin 21,22) External fsc input to Pin 21(*Only for IC Test)
VID-97-D001 98-05-14
2nd ~ 12th line vertical character size control
A
Internal
External / Internal Mode Scroll Display Control Scroll Time Control Blank Color Low Level Control External fsc Clock Input
11
B
Scroll On
0 1 0 1 0 1 0 1
C
Scroll Time
D
Blank L Level
E
Ext fsc
KS5520-XX
3) Register 362 (16AH)
ON SCREEN DISPLAY PROCESSOR
DA0 ~ DAE 0
Contents Register State R_cntr0 0 1 Cntr2 Cntr1 Cntr0 0 0 0 0 1 1 1 1 Lev 1 0 1 0 0 1 1 0 0 1 1 Lev 0 0 1 0 1 0 1 0 1 Functions NTSC Red Blue B+G Yellow Orange Magenta Cyan Gray 0 Level 0 Level 1 PAL Red G+Y B+G Blue Magenta Yellow Green Gray 1 Level 1 Level 2 Character Level Control When SECAM, Blank Color Off is not used. Raster Color Control Remark
1
R_cntr1
0 1
2
R_cntr2
0 1
3
R_lev0
0 1
4
R_lev1
0 1
Raster Color Level Control
5
C_level
0 1
Character Level 1 (2.7V) Character Level 2 (2.5V) Blank Color Off Blank Color On
6
Blank Color
0 1 0 1
7
BLK0
Blank Mode Select by Controlling the Data of Register 363 (16BH)
8
BLK1
0 1
9
NTSC /PAL
0 1 0 1
NTSC PAL NTSC or PAL SECAM Interlace Non-Interlace PAL 1 Field = 626H PAL 1 Field = 628H Display Off Display On RAM is not erased. RAM is erased.
VID-97-D001 98-05-14 12
A
SECAM
Color System Select
B
Interlace /Non-I
0 1 0 1 0 1
Scanning Type Control PAL Mode 1 Field Control Character Display Control
C
P626/ P628
D
DSP ON
E
RAM ERS
0 1
KS5520-XX
ON SCREEN DISPLAY PROCESSOR
4) Register 363 (16BH) DA0 ~ DAC Contents Register State 0 DSP0 0 1 1 DSP1 0 1 2 DSP2 0 1 3 DSP3 0 1 4 DSP4 0 5th line BLANK mode select 1 5 DSP5 0 1 6 DSP6 0 1 7 DSP7 0 1 8 DSP8 0 1 9 DSP9 0 1 A DSPA 0 1 B DSPB 0 1 C All BLK 0 1 Depend on BLK0, BLK1 All screen blank except character 12th line BLANK mode select 11th line BLANK mode select 10th line BLANK mode select C* O* R* Character Blank Outline Blank Raster Blank 9th line BLANK mode select 0 8th line BLANK mode select 1 1 7th line BLANK mode select 6th line BLANK mode select 0 1 0 BLK1 BLK0 DSP 0 1 0 1 0 1 0 1 ALL BLK = 1 Blank Mode Blank Off O* C* O* O* R* R* C* All Blank 4th line BLANK mode select 3th line BLANK mode select 2nd line BLANK mode select 1st line BLANK mode select Functions Remark
VID-97-D001 98-05-14
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KS5520-XX
5) Register 364 (16CH)
ON SCREEN DISPLAY PROCESSOR
DA0 ~ DAE 0
Contents Register State Fch0 0 1 Functions Remark
1
Fch1
0 1
Fch = 30 *^ n=o Fchn * 512 * 2 Capture Range H = 15.36
e
3
n
2
Fch2
0 1
E ~ 230.4 E
E
Sync Detect Capture Range High Sensitity Control
3
Fch3
0 1
4
Fcl0
0 1
5
Fcl1
0 1 Fcl = 30 *^
e Fchn * n=o
3
64 * 2
n
6
Fcl2
0 1
Capture Range L = 1.92
E ~ 28.8 E
E
Sync Detect Capture Range Low Sensitity Control
7
Fcl3
0 1
8
Flh0
0 1
9
Flh1
0 1 Flh = 30 *^
e Fchn * n=o
3
512 * 2
n
A
Flh2
0 1
Locking Range H = 15.36
E ~ 230.4 E
E
Sync Detect Locking Range High Sensitity Control
B
Flh3
0 1
C
Fll0
0 1
D
Fll1
0 1
Fll = 30 *^ n=o Fchn * 64 * 2 Locking Range L = 1.92
e
2
n
E ~ 13.44 E
E
E
Fll2
0 1
VID-97-D001 98-05-14
Sync Detect Locking Range Low Sensitity Control
14
KS5520-XX
11. SCREEN STRUCTURE
ON SCREEN DISPLAY PROCESSOR
30 columns
12 rows
TV Screen
12. BLANK MODE
Blank Off
Raster Blank
Character Blank
Outline Blank
VID-97-D001 98-05-14
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KS5520-XX
13. SCROLL FUNCTION
ON SCREEN DISPLAY PROCESSOR
When control register 361, scroll bit (DAB bit) is high, character display on/off from top to down slowly about 0.5 sec or 1 sec. (also controlled by register setting)
14. HALF-TONE FUNCTION
(c) A AA
TV Screen
When control register 360, half tone bit ( DAD bit ) is high, half luminance level and also display background screen.
character display with
VID-97-D001 98-05-14
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KS5520-XX
15. BOX DRAWING FUNCTION
ON SCREEN DISPLAY PROCESSOR
SAM SUNG OSD Box Drawing
TV Screen
It can draw rectangle box. If you want to concave display, top and left side of characters are drawn black color, bottom and right side of characters are drawn white color and also want to convex display, character colors are vice versa. It is all controlled by each RAM attribution bit, that is box1 (DAE), box0 (DAD) and box_inv (DAF).
box0 box1 0 0 1
BOX OFF
S S
1
S
VID-97-D001 98-05-14
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KS5520-XX
ON SCREEN DISPLAY PROCESSOR
16-1. APPLICATION CIRCUIT (OSD BLOCK)
R177 75 VIDEO OUT Q115 A733 Vin : 2Vpp Vsync: > 0.3Vpp
Q116 5V OUT
KA78T05
VCC (9V) IN R176 430
C153 220O
+
L105 100uH C139 C146 100O
+
VR1 C140 R179 1
5I
+
TP1
C157 1O C143 104
+ C144
100O
C155 100N R180 22I
C145 0.01O
TP2
Y101
24
23
22
XTOUT
21
XTIN
20
19
18
R175 100I
17
16
AVDD
15
R CNTR
14
C NODE2
13
C NODE1
DVDD CSYNC
SYD CVOUT SCCR
CVIN
KS5520
DGND SCK RESETB OSCIN OSCOUT CSB SIN LPF CLAMPIN AGND PD OUT VCO IN
1
2
C147 +
1O
3
4
L106 10uH C142 56p
5
6
7
8
C154 100N
9
C137 4.7O
+
10
R173 200K
11
R178 5I C149 0.01O
12
R174
+ 1K
C141 56p
C150 0.47O
VIDEO IN
12345678
DGND
AGND
JP101
TO MICOM APPLICATION CIRCUIT or PC PARALLEL PORT
The circuit drawn above is for Demo Board. * Y101 (4fsc X-TAL )
a NTSC : 14.31818MHz
PAL : 17.734475MHz
* C139 / C140 : The load CAP of X-TAL Y101 has a difference each according to its manufactures. 27N typical (NTSC), 47N typical (PAL)
VID-97-D001 98-05-14 18
KS5520-XX
ON SCREEN DISPLAY PROCESSOR
16-2. APPLICATION CIRCUIT (CONTROLLER BLOCK)
LCD MODULE
RS RW EN
1 2 3 4 5 6 7 8 9 10 11 12 13 14
+5V VR2 10I VDD (+5V) D201 1N4004 C204 0.01O 1 2 3 4 5 6 7 8 17 22 21 20 19 18 30 31 32 P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 VDD2 P3.3 P3.4 P3.5 P3.6 P3.7 P5.3 P6.4 P6.5 VSS2 P6.7 P6.6 34
1 5 9 13 17 21 F4 F8
VDD1 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RESET
64 63 62 61 60 59 58 57 56 55 51
+
C205 47O
KS88P0016N
XOUT XIN VSS1
C201 27N
+
C202 50 52 47 Y102 27N 11.0592E
SW1 RESET C203 0.47O
0 4 8 12 16 20 F3 F7
33
2 6 10 14 18 F1 F5 F9
3
7
11
15
19
F2
F6
F10
SW2 (5P)
1
2
3
4
5
6
7
8
JP101
SCK
CSB SIN VDD(+5V) GND
TO KS5520 APPLICATION CIRCUIT
VID-97-D001 98-05-14
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KS5520-XX
ON SCREEN DISPLAY PROCESSOR
17. PACKAGE DIMENSIONS
24-SDIP-300
Dimensions in Milimeters
VID-97-D001 98-05-14
20
KS5520-XX
ON SCREEN DISPLAY PROCESSOR
17. PACKAGE DIMENSIONS (Continued)
24-SOP-375
Dimensions in Milimeters
VID-97-D001 98-05-14
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SPECIFICATION
MEMO
HEAD OFFICE : 8/11FL., SAMSUNG MAIN BLDG. 250, 2 - KA. TAEPYUNG - RO, CHUNG - KU, SEOUL, KOREA TEL ........ 2 - 727 - 7114 FAX ........ 2 - 753 - 0967 SEMICONDUCTOR BUSINESS SALES & MARKETING DIVISION : 15/16 FL., SEVERANCE BLDG., 84 - 11, 5 - KA, NAMDAEMOON - RO, CHUNG - KU SEOUL, KOREA TEL ...... 2 - 259 - 1114 FAX ...... 2 - 259 - 2468 SAMSUNG SEMICONDUCTOR INC. 3655 NORTH FIRST STREET, SAN JOSE, CA 95134, U.S.A TEL ..... 408 - 954 - 7000 FAX ..... 408 - 954 - 7873 SAMSUNG SEMICONDUCTOR EUROPE GMBH SAMSUNG HOUSE, AM KRONBERGER HANG 6, 65824 SCHWALBACH/TS TEL ..... 49 - 6196 - 663300 FAX ..... 49 - 6196 - 663311 SAMSUNG SEMICONDUCTOR EUROPE LTD. GREAT WEST HOUSE GREAT WEST ROAD, BRENTFORD, MIDDLESEX TW8 9DQ TEL ..... 181 - 380 - 7132 FAX ..... 181 - 380 - 7220 SAMSUNG ELECTRONICS JAPAN CO., LTD. HAMACHO CENTER BLDG., 31 - 1, NIHONBASHI - HAMACHO, 2 - CHOME, CHUO - KU, TOKYO 103, JAPAN TEL ..... 3 - 5641 - 9850 FAX ..... 3 - 5641 - 9851
SAMSUNG ELECTRONICS HONGKONG CO., LTD. 65TH FL., CENTRAL PLAZA, 18 HARBOUR ROAD, WANCHAI, HONG KONG TEL ....... 852 - 2862 - 6900 FAX ....... 852 - 2866 - 1343 SAMSUNG ELECTRONICS TAIWAN CO., LTD. 30FL., NO.333, KEELUNG RD., SEC1, TAIPEI, TAIWAN, R.O.C TEL ..... 886 - 2 - 757 - 7292 FAX ..... 886 - 2 - 757-7311 SAMSUNG ASIA PRIVATE LIMITED 80. ROBINSON ROAD, #20 - 01 SINGAPORE 068898 TEL ..... 65 - 535 - 2808 FAX ..... 65 - 227 - 2792 SAMSUNG ELECTRONICS CO., LTD. SEMICONDUCTOR BUSINESS BEIJING OFFICE 15FL., BRIGHT CHINA CHANG AN BLDG., NO.7, JIANGUOMEN, NEI AVENUE, BEIJING, CHINA 100005 TEL ..... 8610 - 6510 - 1234(0) FAX ..... 8610 - 6510 - 1545 SAMSUNG ELECTRONICS CO., LTD. SHANGHAI OFFICE 9F, SHANGHAI INTERNATIONAL TRADE CENTRE, NO.2200 YANAN(W) RD., SHANGHAI, CHINA 200335 TEL ..... 8621 - 6270 - 4168 FAX ..... 8621 - 6275 - 2975
VID-97-D001
JAN. 1998

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